Metal core substrate and process for manufacturing same

ABSTRACT

A metal core substrate comprises a core layer ( 10 ) consisting of first and second metal plates ( 11, 12 ) layered with a third insulating layer ( 13 ) interposed therebetween; first and second insulating layers ( 20, 21 ) formed on the first and metal plates, respectively; first and second wiring patterns ( 45, 46 ) formed on the first and second insulating layers, respectively. A conductive layer ( 40 ) formed in a through-hole ( 22 ) penetrates the first insulating layer, the first metal plate, the third insulating layer, the second metal plate and the second insulating layer for electrically connecting the first wiring pattern with the second wiring pattern. The first metal plate ( 11 ) is electrically connected with the first wiring pattern ( 45 ) and the second wiring pattern ( 46 ), respectively, by means of a via ( 44 ) and by means a via ( 43 ). The second metal plate ( 12 ) is electrically connected with the second wiring pattern ( 46 ) and the first wiring pattern ( 45 ), respectively, by means of a via ( 42 ) and by means a via ( 41 ), respectively.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a metal core substrate and amanufacturing process thereof.

[0003] 2. Description of the Related Art

[0004] A metal core substrate is known and is used as a package on whicha semiconductor chip is mounted.

[0005] Concerning the metal core substrate, there have been providedvarious types of structure. According to the official gazette ofJapanese Unexamined Patent Publication (Kokai) No. 2000-244130, there isdisclosed a metal core substrate which has a coaxial structure, of aso-called “Via in Via” type, which reduces inductance and also has acapacitor structure inside.

[0006] As shown in FIG. 18, this metal core substrate 1 is composed asfollows. On the metal plate 2, through-holes 3 are formed, and the upperand lower wiring patterns 5 are electrically connected with each otherby the through-hole plating films 4 in a structure called “Via in Via”.On both sides of the metal plate 2, the copper foil layers 7, 7 areprovided via the dielectric layers 6. These copper foil layers 7, 7 areelectrically connected to the through-hole plating films 4. On the otherhand, the other through-hole plating film 8 and the metal plate 2 areelectrically connected with each other, so that capacitor structures areformed between the metal plate 2 and the copper foil layers 7, 7,respectively.

[0007] The above metal core substrate 1 provides an effect that theinductance can be reduced. Further, the above metal core substrate 1provides an effect of effectively removing noise because the capacitorstructure is formed at a position right below the semiconductor chipwhich is to be mounted.

[0008] However, as shown in FIG. 18, both the through-hole for signaluse and the through-hole used for connection of the metal plate 2 existon the above metal core substrate 1. Therefore, the density of thewiring pattern for signal use must be restricted, that is, it does notallow an increase in the density.

SUMMARY OF THE INVENTION

[0009] The present invention has been accomplished to solve the aboveproblems.

[0010] It is an object of the present invention to provide a metal coresubstrate, and a manufacturing method thereof, characterized in that theelectric performance can be enhanced and high density wiring can beprovided.

[0011] According to the present invention, there is provided a metalcore substrate comprising: a core layer comprising first and secondmetal plates layered by means of a third insulating layer interposedtherebetween; first and second insulating layers formed on the first andsecond metal plates, respectively; first and second wiring patternsformed on the first and second insulating layers, respectively; aconductive means formed in a through-hole penetrating the firstinsulating layer, the first metal plate, the third insulating layer, thesecond metal plate and the second insulating layer to be exposed toinsulating portions with respect to the first and second metal plates,respectively, for electrically connecting the first wiring pattern withthe second wiring pattern; first connecting means for electricallyconnecting the first metal plate with the first wiring pattern and thesecond wiring pattern, respectively, by means of a via penetrating thefirst insulating layer and by means a via formed in a via-holepenetrating the second insulating layer, the second metal plate and thethird insulating layer so as to be exposed to an insulating portion withrespect to the second metal plate; and second connecting means forelectrically connecting the second metal plate with the second wiringpattern and the first wiring pattern, respectively, by means of a viapenetrating the second insulating layer and by means a via formed in avia-hole penetrating the first insulating layer, the first metal plateand the third insulating layer so as to be exposed to an insulatingportion with respect to the first metal plate.

[0012] The first metal plate is a ground plane and the second metalplate is a power plane.

[0013] The first and second wiring patterns are multi-layered patternsformed in and on the first and second insulating layers, respectively.

[0014] The third insulating layer may preferably be a dielectric layer.

[0015] According to another aspect of the present invention, there isprovided a metal core substrate comprising a core layer comprising firstand second metal plates layered with a third insulating layer interposedtherebetween, the first and second metal plates having firstthrough-holes at positions overlapping to each other in a core thicknessdirection, the first and second metal plates also having third andfourth through-holes, respectively, at positions not overlapping to eachother in the core thickness direction; first and second insulatinglayers formed on the first and second metal plates, respectively, sothat the first, third and fourth through-holes are embedded therewith;the first, second and third insulating layers having a secondthrough-hole penetrating therethrough and penetrating the firstthrough-holes so as not to be exposed to the first and second metalplates, respectively; the first and third insulating layers having afirst via-hole penetrating therethrough and penetrating the thirdthrough-hole to be exposed to the second metal plate, but not to beexposed to the first metal plate; the second insulating layer having asecond via-hole penetrating therethrough to be exposed to the secondmetal plate; the second and third insulating layers having a thirdvia-hole penetrating therethrough and penetrating the fourththrough-hole to be exposed to the first metal plate, but not to beexposed to the second metal plate; the first insulating layer having afourth via-hole penetrating therethrough to be exposed to the firstmetal plate; first and second wiring patterns formed on the first andsecond insulating layers, respectively; a conductive means formed in thesecond through-hole for electrically connecting the first wiring patternwith the second wiring pattern; a first via formed in the first via-holefor electrically connecting the second metal plate with the first wiringpattern; a second via formed in the second via-hole for electricallyconnecting the second metal plate with the second wiring pattern; athird via formed in the third via-hole for electrically connecting thefirst metal plate with the second wiring pattern; and a fourth viaformed in the fourth via-hole for electrically connecting the firstmetal plate with the first wiring pattern.

[0016] The second through-hole has a diameter smaller than that of thefirst through-holes, the first via-hole has a diameter smaller than thatof the third through-hole, and the third via-hole has a diameter smallerthan that of the fourth through-hole.

[0017] The first through-hole of the first metal layer and the thirdthrough-hole of the first metal layer are coaxially formed as a singlethrough-hole which has a diameter (A) larger than that (B) of the firstthrough-hole of the second metal layer; the second through-hole and thefirst via-hole are coaxially formed in such a manner that a diameter (C)of the first via-hole is smaller than that (A) of the third through-holeand larger than that (B) of first through-hole, and a diameter (D) ofthe second through-hole is smaller than that (B) of the firstthrough-hole; and the first via and conductive means are coaxial in sucha manner that an insulating portion is interposed therebetween.

[0018] According to still another aspect of the present invention, thereis provided a process for manufacturing a metal core substratecomprising the following steps of: preparing a core layer comprisingfirst and second metal plates layered with a third insulating layerinterposed therebetween; forming the first and second metal plates withfirst through-holes, respectively, at positions overlapping to eachother in a core thickness direction and with third and fourththrough-holes, respectively, at positions not overlapping each other inthe core thickness direction; laminating first and second insulatinglayers on the first and metal plates, respectively, so that the first,third and fourth through-holes are embedded therewith; forming thefirst, second and third insulating layers with a second through-holepenetrating therethrough and penetrating the first through-holes so asnot to be exposed to the first and second metal plates, respectively;the first and third insulating layers with a first via-hole penetratingtherethrough and penetrating the third through-hole to be exposed to thesecond metal plate, but not to be exposed to the first metal plate; thesecond insulating layer with a second via-hole penetrating therethroughto be exposed to the second metal plate; the second and third insulatinglayers with a third via-hole penetrating therethrough and penetratingthe fourth through-hole to be exposed to the first metal plate, but notto be exposed to the first metal plate; and the first insulating layerwith a fourth via-hole penetrating therethrough to be exposed to thefirst metal plate; forming a conductive means in the second:through-hole, a first via in the first via-hole, a second via in thesecond via-hole, a third via formed in the third via-hole, and a fourthvia formed in the fourth via-hole; forming first and second wiringpatterns formed on the first and second insulating layers, respectively,so as to be electrically connected to the conductive means, the firstvia, the second via, the third via, and the fourth via.

BRIEF DESCRIPTION OF THE DRAWINGS

[0019] FIGS. 1 to 9 are manufacturing process drawings in which:

[0020]FIG. 1 is a schematic illustration for explaining a section of acore layer;

[0021]FIG. 2 is a schematic illustration for explaining a section in astate in which through-holes are formed on a metal plate;

[0022]FIG. 3 is a schematic illustration showing another embodiment of athrough-hole;

[0023]FIG. 4 is a schematic illustration showing a section in a state inwhich insulating layers are laminated;

[0024]FIG. 5 is a schematic illustration showing a section in a state inwhich through-holes and via-holes are formed;

[0025]FIG. 6 is a schematic illustration showing a section in a state inwhich electroless plating films are formed;

[0026]FIG. 7 is a schematic illustration showing a section in a state inwhich resist patterns are formed;

[0027]FIG. 8 is a schematic illustration showing a section in a state inwhich electrolytic plating is conducted while a resist pattern is beingused as a mask; and

[0028]FIG. 9 is a schematic illustration showing a section in a state inwhich wiring patterns are formed.

[0029] FIGS. 10 to 17 illustrate another embodiment of a process formanufacturing a metal core substrate in relation to the structure shownin FIG. 3.

[0030]FIG. 18 is a schematic illustration showing a section of anexample of the conventional metal core substrate known in the prior art.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0031] Referring to the accompanying drawings, a preferred embodiment ofthe present invention will be explained in detail below.

[0032] Referring to FIGS. 1 to 9, both the manufacturing process and themetal core substrate are explained as follows.

[0033]FIG. 1 is a view showing a core layer 10 on which two metal platesof the first metal plate 11 and the second metal plate 12 are laminatedwhile an insulating layer 13, such as a dielectric layer 13 isinterposed between them. From the viewpoint of ensuring the mechanicalstrength, it is preferable that the first metal plate 11 and the secondmetal plate 12 are respectively composed of a copper plate of 0.2 to 0.3mm thickness. In this connection, it should be noted that the materialof the metal plates is not limited to the copper plate.

[0034] It is preferable that the dielectric layer 13 is a ferroelectriclayer of 40 to 50 μm thickness in which a powder of a ferroelectricmaterial, such as strontium titanate (STO) or barium titanate, is mixedinto resin such as epoxy, polyimide or polyphenylene ether.

[0035] The core layer 10 is formed in such a manner that two metalplates are laminated while a resin sheet in a tack dry state (stage B),in which ferroelectric powder is mixed, is interposed between them.Alternatively, the core layer 10 is formed in such a manner that afterone metal plate is coated with resin in which ferroelectric powder ismixed, the other metal plate is laminated, so that the two metal platesare made to adhere to each other.

[0036] The dielectric layer 13 may be formed by means of sputtering orby a method of CVD of ferroelectric, materials such as strontiumtitanate or barium titanate. After the dielectric layer has been formedon one metal plate by means of sputtering or by the method of CVD, theother metal plate is laminated by resin (resin sheet or coating ofresin) which becomes an adhesive layer. In this way, the two metalplates are made to adhere to each other so as to form the core layer 10.

[0037] In this case, the metal plates 11, 12 may be made of aluminum or42 alloy (iron-nickel alloy).

[0038] Alternatively, the core layer (substrate) may be formed in such amanner that the metal plates 11, 12, in which the through-holes 15, 16,17 have already been formed by means of etching or punching, arelaminated on each other while the insulating layer (or the dielectriclayer) 13 is being interposed between them.

[0039] In this connection, the above dielectric layer 13 may be a simpleinsulating layer (third insulating layer).

[0040] This insulating layer may be made of a resin such as epoxy,polyimide or polyphenylene ether. In this case, the core layer 10 isformed in such a manner that two metal plates are laminated on eachother while a resin sheet in a tack dry state (B stage) is interposedbetween them. Alternatively, the core layer 10 is formed in such amanner that after one metal plate is coated with resin, the other metalplate is laminated on it so as to make the two metal plates adhere toeach other.

[0041] Next, as shown in FIG. 2, the first metal plate 11 and the secondmetal plate 12 are etched by a method of photolithography so as to formthrough-holes.

[0042] Reference numeral 15 is the first through-hole. The firstthrough-hole is formed on the first metal plate 11 and the second metalplate 12, wherein the first through-hole is formed at a position on thefirst metal plate 11 and the first through-hole is also formed at aposition on the second metal plate, and these two positions overlap eachother with respect to the thickness direction of the core layer 10. Atanother position on the first metal plate 11, which does not overlap aposition on the second metal plate 12 with respect to the thicknessdirection of the core layer 10, the third through-hole 16 is formed, andat another position on the second metal plate 12, which does not overlapthe position on the first metal plate 11 with respect to the thicknessdirection of the core layer 10, the fourth through-hole 17 is formed.

[0043] In this connection, the following composition may be adopted. Asshown in FIG. 3, the first through-hole 15 is formed on the second metalplate 12. On the first metal plate 11, a through-hole, the diameter ofwhich is larger than that of the first through-hole 15 formed on thesecond metal plate 12, is formed at a position overlapping the firstthrough-hole 15 with respect to the thickness direction. A portion ofthe through-hole formed on the first metal plate 11, which agrees withthe through-hole 15 formed on the second metal plate 12, is made to bethe first through-hole 15 a, and a portion of the through-hole formed onthe first metal plate 11, which does not agree with the through-hole 15formed on the second metal plate 12, is made to be the thirdthrough-hole 16. In other words, the through-hole, the diameter of whichis large, may be used as both the first through-hole 15 and the thirdthrough-hole 16, as described later in detail.

[0044] Next, as shown in FIG. 4, first insulating layer 20 and secondinsulating layer 21 are respectively subjected to thermo-compressionbonding to the outer faces of the first metal plate 11 and the secondmetal plate 12 so that the first through-holes 15, the thirdthrough-hole 16 and the fourth through-hole 17 can be embedded in theinsulating layers 20, 21. The first insulating layer 20 and the secondinsulating layer 21 can be made of resin such as epoxy, polyimide orpolyphenylene ether. The first insulating layer 20 and the secondinsulating layer 21 can be formed when a resin sheet in a tack dry state(stage B) is laminated or resin is coated.

[0045] Next, as shown in FIG. 5, a second through-hole 22, the diameterof which is smaller than that of the first through-hole 15, is formed inthe first through-hole 15 so that the second through-hole 22 canpenetrate the first insulating layer 20, the dielectric layer 13 and thesecond insulating layer 21. Accordingly, the insulating portions 23remain on the inner wall of the first through-hole 15.

[0046] The first through-hole 22 may be formed by means of drilling.However, it is preferable that the first through-hole 22 is formed bymeans of irradiated laser beams such as carbonic acid gas (CO₂) laserbeams. When the laser beams are used, it is possible to make a smallthrough-holes, the diameters of which are 100 to 120 μm. Therefore, thedensity of wiring can be increased because of the small holes. In thisconnection, it is necessary to maintain the thickness of the insulatingportion 23 at 40 to 50 μm. Accordingly, the diameter of the firstthrough-hole 15 is determined to be about 200 μm.

[0047] In the third through-hole 16, a first via-hole 24 is formed, thediameter of which is smaller than that of the third through-hole 16, sothat the first via-hole 24 can penetrate the first insulating layer 20and the dielectric layer 13 and further the second metal plate 12 can beexposed to the bottom face of the first via-hole 24. Accordingly, theinsulating portion 25 remains on the inner wall of the thirdthrough-hole 16. It is preferable that the first via-hole 24 is formedby means of irradiated laser beams.

[0048] A second via-hole 26 is formed in such a manner that itpenetrates the second insulating layer 21 and the second metal plate 12is exposed to the bottom face of the second via-hole 26. It ispreferable that this second via-hole 26 is also formed by means ofirradiated laser beams.

[0049] In the fourth through-hole 17, a third via-hole 28 is formed, thediameter of which is smaller than that of the fourth through-hole 17, sothat the third via-hole 28 can penetrate the second insulating layer 21and the dielectric layer 13 and, further, the first metal plate 11 canbe exposed to the bottom face of the third via-hole 28. Accordingly, theinsulating portion 29 remains on the inner wall of the fourththrough-hole 17. It is preferable that the third via-hole 28 is alsoformed by means of irradiated laser beams.

[0050] A fourth via-hole 30 is formed in such a manner that itpenetrates the first insulating layer 20 and the first metal plate 11 isexposed to the bottom face of the fourth via-hole 30. It is preferablethat this fourth via-hole 30 is also formed by means of irradiated laserbeams.

[0051] The second through-hole 22, the first via-hole 24, the secondvia-hole 26, the third via-hole 28 and the fourth via-hole 30 aredifferent from each other in the depth of these holes and the positionsat which these holes are located. However, it is preferable tosimultaneously conduct the process of forming these holes which are tobe formed on the common side of the substrate.

[0052] Next, as shown in FIG. 6, an electroless plating film 32 ofcopper is formed on the inner walls of the second through-hole 22, thefirst via-hole 24, the second via-hole 26, the third via-hole 28 and thefourth via-hole 30.

[0053] Next, as shown in FIG. 7, a dry film resist layer is bonded onthe electroless plating films 32 and exposed to light and developed. Inthis way, the resist patterns 34 are formed so that the electrolessplating films 32 can be exposed after the pattern of wiring patterns tobe formed.

[0054] Next, as shown in FIG. 8, while the resist pattern 34 is beingused as a mask, electrolytic plating films 36 are formed on theelectroless plating films 32 by means of electrolytic copper plating sothat wiring patterns can be formed.

[0055] At the same time, through-hole plating film (conductive layer)40, first via 41, second via 42, third via 43 and fourth via 44 arerespectively formed in the second through-hole 22, the first via-hole24, the second via-hole 26, the third via-hole 28 and the fourthvia-hole 30.

[0056] Next, as shown in FIG. 9, when the resist patterns 34 are removedand the exposed electroless plating films 32 are removed by means ofetching, the first wiring pattern 45 is formed on the first insulatinglayer 20, and the second wiring pattern 46 is formed on the secondinsulating layer 21.

[0057] Bumps such as solder balls (not shown) are formed in externalconnecting terminal portions of the second wiring pattern 46. Pads (notshown) used for mounting a semiconductor chip are formed at the terminalportions of the first wiring pattern 45. In this way, a package used formounting the semiconductor chip can thus be obtained. In thisconnection, resin can be filled in the through-hole 22.

[0058] In the above embodiment, the wiring patterns 45, 46 are formed bya so-called “semi-additive method”. However, it is possible to formpredetermined wiring patterns in any other know methods, such as aso-called “additive method” or “subtractive method”. For example, anelectrolytic plating film (not shown) can be uniformly formed on theelectroless plating films 32 and etched into predetermined wiringpatterns.

[0059] The wiring patterns 45, 46 can be formed into a multiple layer bya “build-up method” (not shown).

[0060] As described above, it is possible to form a metal core substrateof the coaxial structure in which the through-hole plating film 40 issurrounded by both the metal plates 11, 12 via the insulating portion23. Therefore, the inductance can be reduced and the electricperformance can be enhanced. When the second through-hole 22 and othersare machined by means of irradiated laser beams, it is possible to formminute holes. Therefore, it becomes possible to provide wiring of highdensity.

[0061] When the first metal plate 11 is connected to the ground so thatit can be used as a common grounding plane and when the second metalplate 12 is connected to an electric power source so that it can be usedas a common electric power source plane, the number of the connectingsections (the second via 42 and the third via 43) with the mountsubstrate can be reduced. Therefore, the density of the internal wiringcan be enhanced.

[0062] Further, it is possible to form a capacitor of a large capacitybetween the first metal plate 11 and the second metal plate 12. Sincethe capacitor is formed right below a semiconductor chip to be mounted(not shown), the occurrence of noise can be effectively reduced.Electric connection to the first metal plate 11 and the second metalplate 12, which are electrodes of the capacitor, is accomplished by thefirst via 41 and the third via 43, the diameters of which are small,penetrating only one metal plate and also accomplished by the second via42 and the fourth via 44. Therefore, it is unnecessary to accomplishelectric connection via the through-hole plating film penetrating theentire substrate like the conventional example such as shown in FIG. 18.Accordingly, the coaxial structure line, which is composed of thethrough-hole plating film 40 connecting the first wiring pattern 45 withthe second wiring pattern 46, can be arranged at a higher density.Therefore, the density of wiring can be highly enhanced.

[0063] FIGS. 10 to 17 illustrate another embodiment in relation to thestructure shown in FIG. 3. First, in FIG. 10, a core layer 10 isprepared by first and second metal plates 11, 12 layered by means of athird insulating layer 13 interposed therebetween, in the same manner asthe step shown in FIG. 1.

[0064] Next, in FIG. 11, a third through-hole 16 (including firstthrough-hole 15 a) and a first through-hole 15 are formed in the firstand second metal plates 11, 12, respectively, at positions overlappingand co-axial to each other in a core thickness direction. However, thediameter (A) of third through-hole 16 formed in the first metal plate 11is larger than that (B) of the through-hole 15 formed in the secondmetal plate 12.

[0065] Next, in FIG. 12, first insulating layer 20 is laminated on thefirst metal plate 11 and second insulating layer 21 is laminated on thesecond metal plate 12, in such a manner that the insulating layers 20and 21 are embedded in the through-holes 16 and 15, respectively, in amanner similar to the step shown in FIG. 4.

[0066] Next, in FIG. 13, a first via-hole 24 is formed by drilling witha laser beam in such a manner that the first via-hole 24 penetrates thefirst insulating layer 20, the third insulating layer 13, and secondinsulating layer 21, as well as the through-holes 16 and 15. In thisconnection, however, the diameter (C) of this first via-hole 24 issmaller than that (A) of the through-hole 16, but larger than that (B)of the through-hole 15, so that there is an insulating portion on theinner wall of the via-hole 24 with respect to the first metal plate 11and, on the other hand, the second metal plate 12 is exposed at itsperipheral portion of its through-hole 15.

[0067] Next, in FIG. 14, an electroless plating film 53 of copper isformed on the inner wall of the first via-hole 24. Also, an electrolyticplating film (53) is formed on the electroless plating film to obtain ametal layer, which is then etched to form wiring patterns, in thesimilar manner as the steps shown in FIGS. 6-8.

[0068] Next, in FIG. 15, insulating layers 55, 56 are laminated on thewiring patterns 45, 46 thus formed on the first and second insulatinglayers 20 and 21, in such a manner that the insulating layers 55, 56 areembedded in the via-hole 24.

[0069] Next, in FIG. 16, a further through-hole 57 is formed by drillingwith a laser beam in such a manner that the through-hole penetrates theinsulating layers 55, 56. In this connection, however, the diameter (D)of this through-hole 57 is smaller than that (B) of the through-hole 15of the second metal plate 12, so that there is an insulating portion onthe inner wall of the through-hole 57 with respect to the plated metallayer.

[0070] Next, in FIG. 17, a through-hole plating film (conductive layer)59 is formed in the through-hole 57 by electroless plating andelectrolytic plating of copper. Then, the through-hole 57 is filled witha resin 61. The, metal layers are formed on the respective insulatinglayers by electroless plating and electrolytic plating of copper. Inthis connection, the through-hole 57, which has been filled with theresin 61, is also covered by the metal layers thus formed. Then, themetal layers are etched to form wiring patterns.

[0071] It should be understood by those skilled in the art that theforegoing description relates to only a preferred embodiment of thedisclosed invention, and that various changes and modifications may bemade to the invention without departing from the sprit and scopethereof.

1. A metal core substrate comprising: a core layer (10) comprising firstand second metal plates (11, 12) layered by means of a third insulatinglayer (13) interposed therebetween; first and second insulating layers(20, 21) formed on said first and second metal plates, respectively;first and second wiring patterns (45, 46) formed on said first andsecond insulating layers, respectively; a conductive means (40) formedin a through-hole (22) penetrating said first insulating layer (20),said first metal plate (11), said third insulating layer (13), saidsecond metal plate (12) and said second insulating layer (21) to beexposed to insulating portions (23) with respect to said first andsecond metal plates, respectively, for electrically connecting saidfirst wiring pattern with said second wiring pattern; first connectingmeans for electrically connecting said first metal plate (11) with saidfirst wiring pattern (45) and said second wiring pattern (46),respectively, by means of a via (44) penetrating said first insulatinglayer (20) and by means a via (43) formed in a via-hole (28) penetratingsaid second insulating layer (21), said second metal plate (12) and saidthird insulating layer (13) so as to be exposed to an insulating portion(29) with respect to said second metal plate (12); and second connectingmeans for electrically connecting said second metal plate (12) with saidsecond wiring pattern (46) and said first wiring pattern (45),respectively, by means of a via (42) penetrating said second insulatinglayer (21) and by means a via (41) formed in a via-hole (24) penetratingsaid first insulating layer (20), said first metal plate (11) and saidthird insulating layer (13) so as to be exposed to an insulating portion(25) with respect to said first metal plate (11).
 2. A metal coresubstrate as set forth in claim 1, wherein said first metal plate (11)is a ground plane and said second metal plate (12) is a power plane. 3.A metal core substrate as set forth in claim 1, wherein said first andsecond wiring patterns (45, 46) are multi-layered patterns formed in andon said first and second insulating layers (20, 21), respectively.
 4. Ametal core substrate as set forth in claim 1, wherein said thirdinsulating layer (13) is a dielectric layer.
 5. A metal core substratecomprising: a core layer (10) comprising first and second metal plates(11, 12) layered by means of a third insulating layer (13) interposedtherebetween, said first and second metal plates having firstthrough-holes (15) at positions overlapping to each other in a corethickness direction, said first and second metal plates also havingthird and fourth through-holes (16, 17), respectively, at positions notoverlapping to each other in the core thickness direction; first andsecond insulating layers (20, 21) formed on said first and second metalplates, respectively, so that said first, third and fourth through-holes(15, 16, 17) are embedded therewith; said first, second and thirdinsulating layers having a second through-hole (22) penetratingtherethrough and penetrating said first through-holes so as not to beexposed to said first and second metal plates (11, 12), respectively;said first and third insulating layers having a first via-hole (24)penetrating therethrough and penetrating said third through-hole (16) tobe exposed to said second metal plate (12), but not to be exposed tosaid first metal plate (11); said second insulating layer having asecond via-hole (26) penetrating therethrough to be exposed to saidsecond metal plate (12); said second and third insulating layers havinga third via-hole (28) penetrating therethrough and penetrating saidfourth through-hole (17) to be exposed to said first metal plate (11),but not to be exposed to said second metal plate (12); said firstinsulating layer having a fourth via-hole (30) penetrating therethroughto be exposed to said first metal plate (11); first and second wiringpatterns (45, 46) formed on said first and second insulating layers,respectively; a conductive means (40) formed in said second through-hole(22) for electrically connecting said first wiring pattern with saidsecond wiring pattern; a first via (41) formed in said first via-hole(24) for electrically connecting said second metal plate (12) with saidfirst wiring pattern (45); a second via (42) formed in said secondvia-hole (26) for electrically connecting said second metal plate (12)with said second wiring pattern (46); a third via (43) formed in saidthird via-hole (28) for electrically connecting said first metal plate(11) with said second wiring pattern (46); and a fourth via (44) formedin said fourth via-hole (30) for electrically connecting said firstmetal plate (11) with said first wiring pattern (45).
 6. A metal coresubstrate as set forth in claim 5, wherein said second through-hole (22)has a diameter smaller than that of said first through-holes (15), saidfirst via-hole (24) has a diameter smaller than that of said thirdthrough-hole (16), and said third via-hole (28) has a diameter smallerthan that of said fourth through-hole (17).
 7. A metal core substrate asset forth in claim 5, wherein said first metal plate (11) is a groundplane and said second metal plate (12) is a power plane.
 8. A metal coresubstrate as set forth in claim 5, wherein said first and second wiringpatterns (45, 46) are multi-layered patterns formed in and on said firstand second insulating layers (20, 21), respectively.
 9. A metal coresubstrate as set forth in claim 5, wherein said third insulating layer(13) is a dielectric layer.
 10. A metal core substrate as set forth inclaim 5, wherein said first through-hole (15 a) of said first metallayer (11) and said third through-hole (16) of said first metal layer(11) are co-axially formed as a single through-hole which has a diameter(A) larger than that (B) of said first through-hole (15) of said secondmetal layer (12); said second through-hole (22) and said first via-hole(24) are coaxially formed in such a manner that a diameter (C) of saidfirst via-hole (24) is smaller than that (A) of said third through-hole(16) and larger than that (B) of first through-hole (15), and a diameter(D) of said second through-hole (22) is smaller than that (B) of thefirst through-hole (15); and said first via (41) and conductive means(40) are coaxial in such a manner that an insulating portion isinterposed therebetween.
 11. A process for manufacturing a metal coresubstrate comprising the following steps of: preparing a core layer (10)comprising first and second metal plates (11, 12) layered by means of athird insulating layer (13) interposed therebetween; forming said firstand second metal plates (11, 12) with first through-holes (15),respectively, at positions overlapping to each other in a core thicknessdirection and with third and fourth through-holes (16, 17),respectively, at positions not overlapping to each other in the corethickness direction; laminating first and second insulating layers (20,21) on said first and second metal plates (11, 12), respectively, sothat said first, third and fourth through-holes (15, 16, 17) areembedded therewith; forming said first, second and third insulatinglayers with a second through-hole (22) penetrating therethrough andpenetrating said first through-holes so as not to be exposed to saidfirst and second metal plates (11, 12), respectively; said first andthird insulating layers with a first via-hole (24) penetratingtherethrough and penetrating said third through-hole (16) to be exposedto said second metal plate (12), but not to be exposed to said firstmetal plate (11); said second insulating layer with a second via-hole(26) penetrating therethrough to be exposed to said second metal plate(12); said second and third insulating layers with a third via-hole (28)penetrating therethrough and penetrating said fourth through-hole (17)to be exposed to said first metal plate (11), but not to be exposed tosaid second metal plate (12); and said first insulating layer with afourth via-hole (30) penetrating therethrough to be exposed to saidfirst metal plate (11); forming a conductive means (40) in said secondthrough-hole (22), a first via (41) in said first via-hole (24), asecond via (42) in said second via-hole (26), a third via (43) formed insaid third via-hole (28), and a fourth via (44) formed in said fourthvia-hole (30); and forming first and second wiring patterns (45, 46)formed on said first and second insulating layers, respectively, so asto be electrically connected to said conductive means (40), said firstvia (41), said second via (42), said third via (43), and said fourth via(44).
 12. A process as set forth in claim 11, wherein said secondthrough-hole (22) has a diameter smaller than that of said firstthrough-holes (15), said first via-hole (24) has a diameter smaller thanthat of said third through-hole (16), and said third via-hole (28) has adiameter smaller than that of said fourth through-hole (17).
 13. Aprocess as set forth in claim 11, wherein said third insulating layer(13) is a dielectric layer.